Google Taps Intel for Millions of AI Chips Amidst Packaging Industry Strain
Google has reportedly commissioned Intel to package over 3 million AI Tensor Processing Units (TPUs) for delivery in 2028. This move comes as the industry faces a shortage of advanced chip packaging capacity, with Nvidia also reportedly evaluating Intel for future GPU production. SK hynix is testing Intel's packaging for High Bandwidth Memory integration, seeking an alternative to TSMC's oversubscribed CoWoS process.
Key points
- Google has placed an order with Intel for over 3 million TPUs scheduled for 2028.
- Nvidia is reportedly evaluating Intel's packaging capabilities for future multi-die GPU designs.
- SK hynix is testing Intel's EMIB packaging for integration with its High Bandwidth Memory.
- This significant order highlights the increasing demand and limited supply for advanced chip packaging solutions.
- Intel's EMIB packaging is being considered as a key alternative to TSMC's oversubscribed CoWoS process.
Google has reportedly secured a large-scale order with Intel, commissioning the chipmaker to package more than 3 million Tensor Processing Units (TPUs) for delivery in 2028. This significant development, cited by four sources familiar with the matter, underscores the intense demand for advanced chip manufacturing and packaging capabilities.
The move by Google comes amidst a critical bottleneck in the semiconductor supply chain, particularly concerning advanced packaging. Taiwan Semiconductor Manufacturing Company's (TSMC) CoWoS packaging process, the current industry standard for AI accelerators, has been oversubscribed for over two years. Intel's Embedded Multi-die Interconnect Bridge (EMIB) technology is emerging as a crucial alternative for major players.
Further strengthening Intel's position, Nvidia is reportedly evaluating the company's packaging solutions for its future processors. Specifically, Nvidia is said to be considering Intel for building processors that integrate four GPU dies using its upcoming Feynman architecture. Additionally, SK hynix is actively testing the compatibility and reliability of its High Bandwidth Memory (HBM) with Intel's EMIB packaging, aiming to validate it for the stringent requirements of AI accelerators.
Sources
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